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gpt-oss: Add MXFP8 x MXFP4 CUTLASS MOE for SM100 and BF16 x MXFP4 CUTLASS for SM90 + SwigluBias Activation #1396

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@djmmoss djmmoss commented Aug 6, 2025

📌 Description

This PR adds MXFP8 x MXFP4 CUTLASS MOE with SwigluBias for SM100 GPUs.

It also adds BF16 x MXFP4 CUTLASS MOE with SwigluBias for SM 90

🔍 Related Issues

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Summary of Changes

Hello @djmmoss, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!

This pull request introduces support for MXFP8 x MXFP4 CUTLASS Mixture of Experts (MoE) operations, specifically targeting SM100 GPUs. I've also added a new SwigluBias activation function, which can be configured with per-expert parameters. These changes involve significant updates to the quantization pipeline, activation kernels, and the GEMM profiler backend to ensure efficient and accurate mixed-precision computations.

Highlights

  • New Mixed-Precision MoE Support: I've added comprehensive support for MXFP8 x MXFP4 CUTLASS Mixture of Experts (MoE) operations, specifically optimized for SM100 GPUs.
  • Introduction of SwigluBias Activation: A new SwigluBias activation function has been introduced, allowing for per-expert alpha, beta, and limit parameters to fine-tune activation behavior.
  • Enhanced Quantization Functions: The underlying quantization logic and kernels have been updated to seamlessly handle the new MXFP8 and MXFP4 data types, including refactoring of cvt_quant_get_sf_out_offset and quantize_with_block_size.
  • Improved Groupwise Scaling for WFP4A16: I've improved the handling of WFP4A16 groupwise scaling, with precise adjustments to stride and pointer calculations within the kernels.
  • Refactored Activation Kernels: The activation kernels (doGatedActivationKernel, doActivationKernel) have been refactored to use generic ActFn adaptors, making them more flexible and enabling the integration of SwigluBiasAdaptor.
  • Profiler Backend Updates: The GemmProfilerBackend has been updated to correctly account for WFP4A16 quantization and the new SwigluBias parameters when calculating workspace sizes.
  • Updated PyTorch Bindings: The PyTorch bindings (flashinfer_cutlass_fused_moe_sm100_ops.cu) have been modified to pass the new ActivationParams struct and handle swiglu_alpha, swiglu_beta, and swiglu_limit tensors from Python.
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Code Review

This pull request adds support for MXFP8 x MXFP4 CUTLASS MoE with SwigluBias activation for SM100 GPUs. The changes are extensive, including new template instantiations, refactoring of quantization kernels for better generality, and the addition of activation adaptors to handle the new SwigluBias activation. The code is well-structured, and the new features seem to be implemented correctly. I have one suggestion to improve maintainability by refactoring a piece of duplicated code.

Comment on lines +2172 to 2186
float gate_alpha = 1.0f;
float gate_beta = 0.0f;
float gate_limit = std::numeric_limits<float>::infinity();
if (bias_ptr || IsNVFP4 || IsMXFP8 || use_per_expert_act_scale ||
activation_params.swiglu_alpha || activation_params.swiglu_beta ||
activation_params.swiglu_limit) {
// TODO this is almost certainly faster as a linear scan
expert =
findTotalEltsLessThanTarget(expert_first_token_offset, num_experts_per_node, token + 1) -
1;
gate_alpha = activation_params.swiglu_alpha ? activation_params.swiglu_alpha[expert] : 1.0f;
gate_beta = activation_params.swiglu_beta ? activation_params.swiglu_beta[expert] : 0.0f;
gate_limit = activation_params.swiglu_limit ? activation_params.swiglu_limit[expert]
: std::numeric_limits<float>::infinity();
}
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medium

The logic for extracting SwiGLU parameters (gate_alpha, gate_beta, gate_limit) is very similar to the logic in doGatedActivationKernel at lines 2068-2079. To improve maintainability and reduce code duplication, consider refactoring this into a helper function. This function could take activation_params and the expert index as input and return a struct or tuple with the gate parameters.

@djmmoss djmmoss changed the title gpt-oss: Add MXFP8 x MXFP4 CUTLASS MOE + SwigluBias Activation for SM100 gpt-oss: Add MXFP8 x MXFP4 CUTLASS MOE for SM100 and BF16 x MXFP4 CUTLASS for SM90 + SwigluBias Activation Aug 6, 2025
e2m1_and_ufp8sf_scale_to_float,
fp4_quantize,
nvfp4_block_scale_interleave,
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perhaps non-blocking comment, just an alert:

renaming this may break cached weight processing (sgl will use the same code as the tests)
https://github.com/flashinfer-ai/flashinfer/pull/1412/files#diff-d2eee7647631902c9b37dc7b03c56129e3f5b94f88df67cdf18edeff5c03d159R421

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if get_device_arch() == "100a":
nvcc_flags += sm100a_nvcc_flags
elif get_device_arch() == "90a":
nvcc_flags += sm90a_nvcc_flags
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Does sm90a support native fp4 cvt ptx instructions?

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it doesn't I've reverted back some of the changes to reflect that

@@ -299,7 +345,7 @@ def fp4_quantize(
return x_q, sf


def nvfp4_block_scale_interleave(unswizzled_sf: torch.Tensor) -> torch.Tensor:
def block_scale_interleave(unswizzled_sf: torch.Tensor) -> torch.Tensor:
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I would suggest also keeping nvfp4_block_scale_interleave for backward compatibility, as mentioned by @aleozlx

nvfp4_block_scale_interleave = block_scale_interleave

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@@ -16,7 +16,7 @@ namespace flashinfer {

namespace trtllm_allreduce_fusion {

enum class FP4QuantizationSFLayout {
enum class QuantizationSFLayout {
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Can we keep a single source of QuantizationSFLayout? This enum class have been defined several times in different places, I would recommend a standalone header such as include/flashinfer/quantization.cuh for hosting these common classes.

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there is a larger refactor of the quantization utilities through the entire repo that can be done. Can this be handled in a separate PR along with those changes?

@@ -629,6 +605,9 @@ def cutlass_fused_moe(
fc1_expert_biases: Optional[torch.Tensor] = None,
fc2_expert_biases: Optional[torch.Tensor] = None,
input_sf: Optional[torch.Tensor] = None,
swiglu_alpha: Optional[torch.Tensor] = None,
swiglu_beta: Optional[torch.Tensor] = None,
swiglu_limit: Optional[torch.Tensor] = None,
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Can you update the docstring to document the newly added arguments?

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done, please check

nvcc_flags += sm100a_nvcc_flags
elif get_device_arch() == "90a":
nvcc_flags += sm90a_nvcc_flags
else:
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Isn't this an issue to query the current GPU here? Wouldn't this break AOT build where we want to build independently of even having a GPU available?

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makes sense, I've split it out and created two gen functions which are now included in the aot please let me know if that works.

@functools.cache
def get_device_arch():
major, minor = torch.cuda.get_device_capability()
suffix = "a" if major >= 9 else ""
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Can we support sm100f instead of sm100a to support the family out-of-the-box?

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I think I've removed this issue now

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LG, I'll let @yzh119 have another look (tomorrow probably)

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djmmoss commented Aug 15, 2025

Hold off for now, I've run into a small error with the AOT build, this cleans up kernels that should be part of the build...

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4 participants